The present disclosure relates to computing systems that employ one or more caches. More particularly, the present disclosure relates to completing data requests based on selective downstream cache processing.
Cache memories in a computing system can improve processor, application, and/or computing system performance by storing data (e.g., a computer instruction, or an operand of a computer instruction) in a memory that has a lower access latency (time to read or write data) as compared to other memories, such as a main memory (e.g., primary RAM) or a non-volatile storage device (e.g., a disk). Cache memory can be included in a processor, and/or between a processor and another memory (e.g., another cache memory and/or a main memory) and can store a copy of data otherwise stored in a main memory. For example, processors can include a local, or “Level 1” (L1), cache, and computing systems can include additional caches, such as “level 2” (L2) and “level 3” (L3) caches, between a processor (or, a local cache of a processor) and another memory (e.g., a main memory).